Computer Architecture

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Computer Architecture

Final Project – Unit 3

Case Study

Professor: Angel Arturo Pech.

Student: Didier Dzib Briceño.

Data Engineering 2B

WHAT IS THE CENTRAL PROCESSING UNIT?

The central processor or CPU is the component responsible for executing programs. It is made up of a complex collection of electronic circuits.

For this purpose, the Von Neumann architecture proposes that it should have the following basic elements:

Arithmetic-Logic Unit (ALU): it is a set of circuits (typically combinational) that implement a set of operations, including addition and subtraction (in 2's complement arithmetic), bit-by-bit logic operations (AND, OR, EXOR, NOT) and shift operations. More advanced ALUs include multiplication and division operations (although in this case they are implemented as a sequential machine that implements some algorithm for these operations).

Control Unit: sequential circuit that implements the so-called "instruction cycle", allowing to access the next instruction of a program, read its operands, perform the operation indicated in the ALU and save the result of this.

The Control Unit is, in short, a sequential machine that performs the "instruction cycle": an ordered and sequential set of actions that properly interconnect the different elements in time, to achieve the objective of executing the instruction by performing the indicated operation on the corresponding operands and storing the result in the indicated place. This sequential machine works synchronized by a clock, which is also used to synchronize all the activities of the other elements of the system (memory and input/output).

Bank (Set) of Registers: a series of special memory locations, physically located within the CPU itself, that allow much faster access to operands and result storage locations than if they were in the normal memory system. Some of these registers are for internal use of the CPU itself (more precisely of its Control Unit) and others are accessible and usable by the programmer.

The Register Bank contains registers of three categories from the point of view of their function in relation to the programs and the internal operation of the CPU:

• Fully visible: these are the aforementioned general purpose or custom registers that contain operands or addresses for use in instructions. The "low-level" programmer manipulates them directly in the programs.
• Partially visible: these are registers that have special functions but participate in some indirect way in the instructions. The programmer manipulates them indirectly in certain specific instructions. Examples of this type of registers are the IP (Instruction Pointer), also called PC (Program Counter), which contains the address of the next instruction to be executed (in some architectures it stores the address of the instruction currently being executed), the SP (Stack Pointer) which contains the pointer to the first place in the stack in "stack" architectures and the PS (Processor Status) also called FLAGS register (in the case of Intel) which contains the processor status including the value taken by the condition bits (Negative, Zero, Carry, Overflow) depending on the result of the last operation performed by the ALU.
• Internal: these are registers used by the CPU Control Unit to execute instructions. They store constants, the state of the CU, the instruction in execution (its binary code), intermediate results of address calculations, etc. They are not visible in any way to the programmer.

The internal memory: The central processor is an extremely fast device, but its work would be delayed if it were forced to wait for data and instructions from an external storage device. It therefore has an internal memory and a collection of registers that speed up processing.

PROCESSOR OPERATION.

The fundamental operation of most CPUs is to execute a sequence of stored instructions called a "program". The program is represented by a series of numbers that are held in a certain kind of computer memory. There are four steps that almost all Von Neumann architecture CPUs use in their operation: fetch, decode, execute, and writeback.

The first step, fetch, involves fetching an instruction, (which is represented by a number or a sequence of numbers), from program memory. The location in program memory is determined by a program counter (PC), which stores a number that identifies the current position in the program. In other words, the program counter indicates to the CPU the location of the instruction in the current program. After an instruction is read, the Program Counter is incremented by the length of the instruction word in terms of memory units.

The instruction that the CPU reads from memory is used to determine what the CPU should do. In the decoding step, the instruction is broken down into parts that have meaning to other CPU units. Often, a group of numbers in the instruction, called an opcode, indicates which operation to perform. The remaining parts of the number usually provide information required for that instruction, such as operands for an addition operation.

After the read and decode steps, the instruction execution step is carried out. During this step, several CPU units are connected in such a way that they can perform the desired operation. If, for example, an addition operation was requested, an arithmetic unit (ALU) will be connected to a set of inputs and a set of outputs. The inputs provide the numbers to be added, and the outputs will contain the final sum.

The final step, writeback, simply "writes" the results of the execution step to some form of memory. Most often, the results are written to some internal CPUS register for quick access by subsequent instructions. In other cases, the results may be written to a slower but cheaper and larger main memory.

After the execution of the instruction and the writing of the resulting data, the entire process is repeated with the next instruction cycle, usually reading the next instruction in sequence due to the incremented value in the program counter. If the completed instruction was a jump, the program counter will be modified to contain the address of the instruction that was jumped to, and program execution continues normally.

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